U3 DAC fast ramp
Posted 24 August 2012 - 03:11 AM
Posted 24 August 2012 - 07:49 AM
Confirm that you are getting the expected command/response rates from Section 3.1. In particular, the ~0.6ms time with no analog inputs from Table 3.1-1:
Download the VC6_LJUD archive to get the allio (All I/O) example, and follow the instructions from the Dev-C example about how to adapt VC6 examples to Dev-C.
Use good programming techniques to achieve these speeds in your actual application. In your loop that creates the ramp, make sure minimal other things are going on (minimal processing/calculations, no file i/o, no screen updates), and make sure that when that loop is executing there are no other threads executing. Shut down as many other Windows programs and processes as possible. Use task manager to assign top priority to your program's process.
You might consider the LJ_ioPUT_WAIT method mentioned in the app note. The question is how many updates you can get in a single packet? The last few paragraphs of Section 3.1 have some info about this.
The low-level Feedback command has room for 57 bytes of data, and the response has room for 55 bytes of data (Section 5.2.5).
Keep your wait between 128 and 32640 us. That way the UD driver will just use a low-level WaitShort iotype for each wait, which means 2 command bytes and 0 response bytes (Section 188.8.131.52).
Each DAC update has 3 command bytes and 0 response bytes (Section 184.108.40.206).
That suggests to me that you can do 11 pairs of DAC updates & waits to make your ramp. Note that the steps will likely be smoothed a bit by the fact that the bandwidth of the U3 DACs is only 16 Hz.
Posted 28 August 2012 - 03:47 AM
Posted 28 August 2012 - 07:05 AM
The reason the low-level functions are documented is that some people use the low-level protocol directly, and don't use a higher level driver like the UD driver. In your case, I pointed you to the low-level functions not because you should use them, but just to get a deeper understanding of what is happening underneath.
Is there any way to see/debug these low-level functions or the description within the guide is only for generic information purposes?
Not exactly. There is no internal clock signal. Rather, the timing is dictated by the WAIT commands. The following topic has some pseudocode. Try it, and if you have trouble post a snippet of your code:
If I understand you correctly by using and internal clock signal and this LJ_ioPUT_WAIT method the DAC ramp up- down can be handled as a "streaming"
Posted 28 August 2012 - 08:06 AM
Posted 28 August 2012 - 12:22 PM
Posted 30 August 2012 - 05:20 AM
Posted 30 August 2012 - 08:21 AM
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